Soc/Ip Verification Engineer: Uvm & Coverage

A global technology leader is seeking a hands-on SoC Design Verification Engineer in Jalisco, Mexico. You will drive verification for complex SoC/IP blocks, own the verification lifecycle, and collaborate with cross-functional teams to deliver high-quality silicon. Ideal candidates will have a Bachelor's degree in Electrical Engineering, 5+ years of relevant experience, and strong debugging skills. This role requires an on-site presence and offers a dynamic work environment.
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