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Layout Engineer - Dram Design (San Pedro Tlaquepaque)
Job Description
Role and Responsibilities
- Responsible for Design and development of IP layouts used in DRAM chips.
- Perform layout verification like LVS/DRC/EM, quality check and documentation.
- Responsible for on-time delivery of block-level layouts with acceptable quality.
- Demonstrate leadership Skill in planning, area/time estimation, scheduling, delegation and execution to meet project schedule/milestones in multiple project environment.
- Guide and lead junior team-members in their execution of Sub block-level layouts & review their work.
- Contribute to effective project-management.
- Plan and document your layout, presenting material for global teams to review- Optimally connect with engineering teams in India, Japan the US, and other general teams to ensure the success of the layout project.
- Must have 4+ years of experience in layout designs in advanced CMOS process.
- Shoul...